Поиск по каталогу |
(строгое соответствие)
|
- Профессиональная
- Научно-популярная
- Художественная
- Публицистика
- Детская
- Искусство
- Хобби, семья, дом
- Спорт
- Путеводители
- Блокноты, тетради, открытки
Cache Configuration for High Performance Embedded Systems.
В наличии
Местонахождение: Алматы | Состояние экземпляра: новый |
Бумажная
версия
версия
Автор: Srilatha Chepure,C. V. Guru Rao and N. Ramesh Babu
ISBN: 9783659392320
Год издания: 2013
Формат книги: 60×90/16 (145×215 мм)
Количество страниц: 56
Издательство: LAP LAMBERT Academic Publishing
Цена: 22726 тг
Положить в корзину
Позиции в рубрикаторе
Отрасли знаний:Код товара: 122688
Способы доставки в город Алматы * комплектация (срок до отгрузки) не более 2 рабочих дней |
Самовывоз из города Алматы (пункты самовывоза партнёра CDEK) |
Курьерская доставка CDEK из города Москва |
Доставка Почтой России из города Москва |
Аннотация: Embedded computing systems are special-purpose computer systems designed for applications to perform a specific task. With enormous advancements in technology, embedded system applications range from toys to avionics. The design of these systems involve challenging metrics out which performance and power form the most crucial ones. Recent advancements in semiconductor technology have made power consumption also a limiting factor for embedded system design. SRAM being faster than the DRAM, cache memory comprising of SRAM is configured between the CPU and the main memory. The CPU can access the main memory (DRAM) only via the cache memory. Cache memories are employed in all the computing applications along with the processors. The size of cache allowed for inclusion on a chip is limited by the large physical size and large power consumption of the SRAM cells used in cache memory. Hence, its effective configuration for small size and low power consumption is very crucial in embedded system design. An optimal cache configuration technique is presented for the effective reduction of size and high performance. It is also shown that not only the memory module, but also the bus interconnect
Ключевые слова: Performance, Architecture, Embedded System, Cache