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Implementation of MAC using modified booth algorithm.
В наличии
Местонахождение: Алматы | Состояние экземпляра: новый |
Бумажная
версия
версия
Автор: Issac P. Zacharia
ISBN: 9783659972249
Год издания: 2019
Формат книги: 60×90/16 (145×215 мм)
Количество страниц: 60
Издательство: LAP LAMBERT Academic Publishing
Цена: 23208 тг
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Аннотация: Power dissipation is recognized as a critical parameter in modern VLSI design field. To satisfy MOORE’S law and to produce consumer electronics goods with more backup and less weight, low power VLSI design is necessary. Fast multipliers are essential parts of digital signal processing systems. The speed of multiply operation is of great importance in digital signal processing as well as in the general purpose processors today, especially since the media processing took off. In the past multiplication was generally implemented via a sequence of addition, subtraction, and shift operations. Multiplication can be considered as a series of repeated additions. The number to be added is the multiplicand, the number of times that it is added is the multiplier, and the result is the product. Each step of addition generates a partial product. In most computers, the operand usually contains the same number of bits. When the operands are interpreted as integers, the product is generally twice the length of operands in order to preserve the information content.
Ключевые слова: Implementation, MAC, booth, Algorithm, mathematics, formula