Design and Implementation. Of Very High Speed Unique Multiplier Unit for Signed and Unsigned Numbers

      Аннотация: Explosive growth in the Very Large Scale Integrated (VLSI) industry using submicron Complementary Metal Oxide Semiconductor (CMOS) process technology, it is possible to place entire system-on- chip (SOC). As the VLSI technology is growing the computational speed of the system is also increasing, with a need of lower power dissipation. Among several computational units, multiplication operation is the basic need for many applications. High speed Digital Signal Processor (DSP) applications such as image processing, 2-D, 3-D graphics, video compression, decompression, communication systems, high speed embedded systems, supercomputers and vector processors requires high speed multipliers.

Ключевые слова: power dissipation, Noise margin, propagation delay, Delay power product, Silicon Chip area, Fan-in, Fan-out, Overview of multipliers, Array multipliers, Serial multiplier, Booth’s multiplier, Baugh-Wooley multiplier, Pipeline multiplier, Superscalar pipeline multiplier, Wallace tree multiplier